CD4024BMS Description
All counter stages are master-slave flip-flops. The state of a counter advances one count on the negative transition of each input pulse; a high level on the RESET line resets the counter to its all zeros state.
CD4024BMS Key Features
- High Voltage Types (20V Rating)
- Medium Speed Operation
- Fully Static Operation
- Buffered Inputs and Outputs
- 100% Tested for Quiescent Current at 20V
- Standardized Symmetrical Output Characteristics
- mon Reset
- 5V, 10V and 15V Parametric Ratings
- Maximum Input Current of 1µa at 18V Over Full Package-Temperature Range
- 100nA at 18V and 25oC