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CD40257BMS - CMOS Quad 2 Line to 1 Line Data Selector/Multiplexer

General Description

of ‘B’ Series CMOS Devices” A1 2 B1 3 D1 4 A2 5 B2 6 D2 7 VSS 8 Applications Digital Multiplexing Shift Right/Shift Left Registers True/Complement Selection Functional Diagram OUTPUT DISABLE 15 A1 B1 2 3 5 6 11 A3 B3 A4 B4 10 14 13 1 INPUT SELECT VDD = 16 VSS = 8 12

Key Features

  • High Voltage Type (20V Rating).
  • 3-State Outputs.
  • 100% Tested for Quiescent Current at 20V INPUT SELECT 1 16 VDD 15 OUTPUT.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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CD40257BMS December 1992 CMOS Quad 2 Line to 1 Line Data Selector/Multiplexer Pinout CD40257BMS TOP VIEW Features • High Voltage Type (20V Rating) • 3-State Outputs • 100% Tested for Quiescent Current at 20V INPUT SELECT 1 16 VDD 15 OUTPUT DISABLE 14 A4 13 B4 12 D4 11 A3 10 B3 9 D3 • 5V, 10V and 15V Parametric Ratings • Maximum Input Current of 1µA at 18V Over Full Package Temperature Range; 100nA at 18V and +25oC • Noise Margin (Over Full Package/Temperature Range) - 1V at VDD = 5V - 2V at VDD = 10V - 2.5V at VDD = 15V • Standardized Symmetrical Output Characteristics • Meets All Requirements of JEDEC Tentative Standard No.