CD4031BMS Datasheet | Intersil

December 1992 CMOS 64-Stage Static Shift Register Description The CD4031BMS is a static shift register that contains 64 Dtype, master-slave flip-flop stages and one stage which is a D-type master flip-flop only (referred to as a 1/2 stage). The logic level present at the DATA input is transferred into the first stage and shifted one stage at each positive-going clock transition. Maximum clock frequencies up to 12MHz (typical) can be obtained. Because fully static operation is allowed, information can be permanently stored with the clock line in either the low or high state. The CD4031BMS has a MODE CONTROL input that, when in the high state, allows operation in the recirculating...