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CD4043BMS - CMOS Quad 3 State R/S Latche

General Description

of ‘B’ Series CMOS Devices” Pinout Applications Holding Register in Multi-Register System Four Bits of Independent Storage with Output ENABLE Strobed Register General Digital Logic CD4043BMS for Positive Logic Systems CD4044BMS for Negati

Key Features

  • High Voltage Types (20V Rating).
  • Quad NOR R/S Latch- CD4043BMS.
  • Quad NAND R/S Latch - CD4044BMS.
  • 3 State Outputs with Common Output ENABLE.
  • Separate SET and RESET Inputs for Each Latch.
  • NOR and NAND Configuration.
  • 5V, 10V and 15V Parametric Ratings.
  • Standardized Symmetrical Output Characteristics.
  • 100% Tested for Quiescent Current at 20V.
  • Maximum Input Current of 1a at 18V Over Full Package-Temperature Ra.

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📁 Similar Datasheet

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CD4043B CMOS QUAD 3-STATE R/S LATCHES RCA
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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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DATASHEET CD4043BMS, CD4044BMS CMOS Quad 3 State R/S Latches FN3311 Rev 0.00 December 1992 Features • High Voltage Types (20V Rating) • Quad NOR R/S Latch- CD4043BMS • Quad NAND R/S Latch - CD4044BMS • 3 State Outputs with Common Output ENABLE • Separate SET and RESET Inputs for Each Latch • NOR and NAND Configuration • 5V, 10V and 15V Parametric Ratings • Standardized Symmetrical Output Characteristics • 100% Tested for Quiescent Current at 20V • Maximum Input Current of 1a at 18V Over Full Package-Temperature Range; - 100nA at 18V and 25oC • Noise Margin (Over Full Package Temperature Range): - 1V at VDD = 5V - 2V at VDD = 10V - 2.5V at VDD = 15V • Meets All Requirements of JEDEC Tentative Standard No.