CD4063BMS Overview
This logic circuit determines whether one 4-bit word (Binary or BCD) is “less than”, “equal to”, or “greater than” a second 4-bit word. The CD4063BMS has eight paring inputs (A3, B3, through A0, B0), three outputs (A < B, A = B, A > B) and three cascading inputs (A < B, A = B, A > B) that permit systems designers to expand the parator function to 8, 12, 16 . When a single CD4063BMS is used, the cascading inputs are...
CD4063BMS Key Features
- High Voltage Type (20V Rating)
- Expansion to 8, 12, 16 . . . 4N Bits by Cascading Units
- Medium Speed Operation
- pares Two 4-Bit Words in 250ns (Typ.) at 10V
- 100% Tested for Quiescent Current at 20V
- Standardized Symmetrical Output Characteristics
- 5V, 10V and 15V Parametric Ratings
- Maximum Input Current of 1µA at 18V Over Full Package Temperature Range; 100nA at 18V and +25oC
- Noise Margin (Full Package Temperature Range)
- 1V at VDD = 5V
