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CD4076BMS - CMOS 4 -Bit D-Type Registers

General Description

of ‘B’ Series CMOS Devices” OUTPUT DISABLE Functional Diagram DATA INPUT DISABLE G1 9 14 D1 13 D2 12 4D - TYPE FLIP-FLOPS WITH AND-OR LOGIC 4 Q2 5 10 G2 CLOCK 7 1 OUTPUT DISABLE M 2 3 Q1 N Description CD4076BMS types are four-bit registers consisting of D-type flip-flops that feature three-state ou

Key Features

  • High Voltage Type (20V Rating).
  • Three State Outputs.
  • Input Disabled Without Gating the Clock.
  • Gated Output Control Lines for Enabling or Disabling the Outputs.
  • Standardized Symmetrical Output Characteristics.
  • 100% Tested for Quiescent Current at 20V.
  • Maximum Input Current of 1µA at 18V Over Full Package Temperature Range; 100nA at 18V and +25oC.
  • Noise Margin (Over Full Package/Temperature Range) - 1V at VDD = 5V - 2V at VDD.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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CD4076BMS December 1992 CMOS 4 -Bit D-Type Registers Pinout CD4076BMS TOP VIEW M N Q1 Q2 Q3 Q4 CLOCK VSS 1 2 3 4 5 6 7 8 16 VDD 15 RESET 14 DATA 1 13 DATA 2 12 DATA 3 11 DATA 4 10 G2 9 G1 DATA INPUT DISABLE Features • High Voltage Type (20V Rating) • Three State Outputs • Input Disabled Without Gating the Clock • Gated Output Control Lines for Enabling or Disabling the Outputs • Standardized Symmetrical Output Characteristics • 100% Tested for Quiescent Current at 20V • Maximum Input Current of 1µA at 18V Over Full Package Temperature Range; 100nA at 18V and +25oC • Noise Margin (Over Full Package/Temperature Range) - 1V at VDD = 5V - 2V at VDD = 10V - 2.5V at VDD = 15V • 5V, 10V and 15V Parametric Ratings • Meets All Requirements of JEDEC Tentative Standard No.