CDP68HC68P1
Key Features
- Fully Static Operation
- Operating Voltage Range 3-6V
- 2 External Address Pins Tied to VDD or VSS to Allow Up to 4 Devices to Share the Same Chip Enable
- Versatile Bit-Set and Bit-Clear Capability
- Accepts Either SCK Clock Polarity - SCK Voltage Level is Latched When Chip Enable Goes Active
- All Inputs are Schmitt-Trigger
- 8-Bit I/O Port - Each Bit can be Individually Programmed as an Input or Output Via an 8-Bit Data Direction Register
