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CDP68HC68P1 - CMOS Serial 8-Bit Input/Output Port

Datasheet Summary

Description

ID0, ID1 - Chip identify pins, normally tied to VDD to VSS.

The 4 possible combinations of these pins allow 4 I/Os to share a common chip enable.

When the levels at these pins match those of the identify bits in the control word, the serial bus is enabled.

Features

  • a compare function that compares the data register and port pin values for 4 programmable conditions and sets a software accessible flag if the condition is satisfied. The user also has the option of bit-set or bit-clear when writing to the data register. Features.
  • Fully Static Operation.
  • Operating Voltage Range 3-6V.
  • Compatible with Intersil/Motorola SPI Bus.
  • 2 External Address Pins Tied to VDD or VSS to Allow Up to 4 Devices to Share the Same Chip Enable.

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Datasheet preview – CDP68HC68P1

Datasheet Details

Part number CDP68HC68P1
Manufacturer Intersil Corporation
File Size 253.21 KB
Description CMOS Serial 8-Bit Input/Output Port
Datasheet download datasheet CDP68HC68P1 Datasheet
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Full PDF Text Transcription

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® CDP68HC68P1 Data Sheet September 2003 FN1858.3 CMOS Serial 8-Bit Input/Output Port The CDP68HC68P1 is a serially addressed 8-bit Input/Output port that allows byte or individual bit control. It consists of three registers, an output buffer and control logic. Data is shifted in and out of the device via shift register that utilizes the SPI (Serial Peripheral Interface) bus. The I/O port data flow is controlled by the Data Direction Register and data is stored in the Data Register that outputs or senses the logic levels at the buffered I/O pins. All inputs, including the serial interface are Schmitt triggered.
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