FN4871 Datasheet | Intersil

HIP6502B Data Sheet May 2000 File Number Multiple Linear Power Controller with ACPI Control Interface The HIP6502B plements either an HIP6020 or an HIP6021 in ACPI-pliant designs for microprocessor and puter applications. The IC integrates four linear controllers/regulators, switching, monitoring and control functions into a 20-pin SOIC package. One linear controller generates the 3.3VDUAL/3.3VSB voltage plane from the ATX supply’s 5VSB output, powering the south bridge and the PCI slots through an external pass transistor during sleep states (S3, S4/S5). A second transistor is used to switch in the ATX 3.3V output for operation during S0 and S1/S2 (active) operating states. Two linear controllers/regulators supply at choice either or both of the puter system’s 2.5V or 3.3V memory power through external pass transistors in active states. During sleep states, integrated pass transistors supply the sleep power. Another controller powers up the 5VDUAL plane by switching in the ATX 5V output in active states, and the ATX 5VSB in sleep states. One internal regulator outputs a dedicated, noise-free 2.5V clock chip supply. The HIP6502B’s operating mode (active outputs or sleep outputs) is selectable through two digital control pins, S3 and S5. Enabling sleep state support on the 5VDUAL output is offered through the EN5VDL pin. In active state, the 3.3VDUAL and 3.3VMEM linear regulators use external N-channel pass MOSFETs to connect the outputs directly to the 3.3V input supplied by an ATX (or equivalent) power supply, for minimal losses. In sleep state, power delivery on both outputs is transferred to NPN transistors external to the controller on the 3.3VDUAL, internal on the 3.3VMEM . Active state regulation on the 2.5VMEM output is performed through an external NPN transistor. In sleep state, conduction on this output is transferred to an internal pass transistor. The 5VDUAL output is powered through two external MOS transistors. In sleep...