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HC6094 - ADSL Analog Front End Chip

General Description

The HC6094 performs the Analog processing for the ADSL chip set.

The transmit chain has a 14 Bit DAC, a third-order Chebyshev reconstruction filter and a programmable attenuator (-12 to 0dB) capable of driving a 220Ω differential load.

Key Features

  • 14-Bit 5 MSPS DAC.
  • Programmable Gain Stages.
  • Anti-Aliasing and Reconstruction Filters.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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Semiconductor February 1999 T UCT ROD ACEMEN 47 P E 7 T L OLE REP 00-442-7 OBS ENDED 8 M ns 1 .com COM pplicatio @harris E R NO ntral A entapp Ce : c Call or email HC6094 ADSL Analog Front End Chip VSSA_RX D0 (LSB) PGAI+ PGAO+ VDDA_RX PGAO- [ /Title (HC60 94) /Subject (ADSL Analog Front End Chip) /Autho r () /Keywords (Harris Semiconductor, Telecom, SLICs, SLACs , Telephone, Telephony, WLL, Wireless Local Loop, PBX, Private Branch Exchan ge, NT1+, CO, Cen- Features • 14-Bit 5 MSPS DAC • Programmable Gain Stages • Anti-Aliasing and Reconstruction Filters Description The HC6094 performs the Analog processing for the ADSL chip set.