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HMU17 - (HMU16 / HMU17) 16 x 16-Bit CMOS Parallel Multipliers

Download the HMU17 datasheet PDF. This datasheet also covers the HMU16_Intersil variant, as both devices belong to the same (hmu16 / hmu17) 16 x 16-bit cmos parallel multipliers family and are provided as variant models within a single manufacturer datasheet.

General Description

SYMBOL VCC GND X0-X15 Y0-Y15/ P0-P15 P16-P31/ P0-P15 TCY, TCX FT FA PLCC PIN NUMBER 1, 68 2, 3 47-59, 61-63 27-42 I I/O TYPE DESCRIPTION VCC.

The +5V power supply pins.

A 0.1µ F capacitor between the VCC and GND pins is recommended.

Key Features

  • 16 x 16-Bit Parallel Multiplier with Full 32-Bit Product.
  • High-Speed (35ns) Clocked Multiply Time.
  • Low Power Operation - ICCSB = 500µA Maximum - ICCOP = 7.0mA Maximum at 1MHz.
  • Supports Two’s Complement, Unsigned Magnitude and Mixed Mode Multiplication.
  • HMU16 is Compatible with the AM29516, LMU16, IDT7216 and the CY7C516.
  • HMU17 is Compatible with the AM29517, LMU17, IDT7217 and the CY7C517.
  • TTL Compatible Inputs/Outputs.
  • Thr.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (HMU16_Intersil-Corporation.pdf) that lists specifications for multiple related part numbers.

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
www.DataSheet4U.com HMU16, HMU17 TM Data Sheet November 1999 File Number 2803.4 16 x 16-Bit CMOS Parallel Multipliers itle MU , U1 bt x -Bit OS ralltiers) utho ) eyrds terrpoion, inctor, ralltier, C, gi, P, el ncn, send, The HMU16 and HMU17 are high speed, low power CMOS 16-bit x 16-bit multipliers ideal for fast, real time digital signal processing applications. The X and Y operands along with their mode controls (TCX and TCY) have 17-bit input registers. The mode controls independently specify the operands as either two’s complement or unsigned magnitude format, thereby allowing mixed mode multiplication operations. Two 16-bit output registers are provided to hold the most and least significant halves of the result (MSP and LSP).