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X5083 - CPU Supervisor

General Description

FUNCTION Chip Select Input.

CS HIGH, deselects the device and the SO output pin is at a high impedance state.

Unless a nonvolatile write cycle is underway, the device will be in the standby power mode.

Key Features

  • Low VCC detection and reset assertion - Four standard reset threshold voltages 4.63V, 4.38V, 2.93V, 2.63V - Re-program low VCC reset threshold voltage using special programming sequence - Reset signal valid to VCC = 1V.
  • Selectable time out watchdog timer.
  • Long battery life with low power consumption -.

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📁 Similar Datasheet

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Other Datasheets by Intersil (now Renesas)

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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® X5083 Data Sheet June 15, 2006 FN8127.3 CPU Supervisor with 8Kbit SPI EEPROM This device combines four popular functions, Power-on Reset Control, Watchdog Timer, Supply Voltage Supervision, and Block Lock Serial EEPROM Memory in one package. This combination lowers system cost, reduces board space requirements, and increases reliability. Applying power to the device activates the power-on reset circuit which holds RESET active for a period of time. This allows the power supply and oscillator to stabilize before the processor can execute code. The Watchdog Timer provides an independent protection mechanism for microcontrollers. When the microcontroller fails to restart a timer within a selectable time out interval, the device activates the RESET signal.