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AD0802 Datasheet PDF

Intersil AD0802

The ADC0802 family are CMOS 8-Bit, successive-approximation A/D converters which use a modified potentiometric ladder and are designed to operate with the 8080A control bus via three-state outputs. These converters appear to the processor as memory locations or I/O ports, and hence no interfacing logic is required.
Part No. AD0802
Datasheet AD0802 Download
Manufacturer
Intersil
Description 8-Bit Microprocessor-Compatible
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AD0802 datasheet page 1 preview

DESCRIPTION

The differential analog voltage input has good commonmode-rejection and permits offsetting the analog zero-inputvoltage value. In addition, the voltage reference input can be adjusted to allow encoding any smaller analog voltage span to the full 8 bits of resolution.

FEATURES

● 80C48 and 80C80/85 Bus Compatible - No Interfacing Logic Required
● Conversion Time < 100µs
● Easy Interface to Most Microprocessors
● Will Operate in a “Stand Alone” Mode
● Differential Analog Voltage Inputs
● Works with Bandgap Voltage References
● TTL Compatible Inputs and Outputs
● On-Chip Clock Generator
● 0V to 5V Analog Voltage Input Range (Single + 5V Supply)
● No Zero-Adjust Required Ordering Information PART NUMBER ADC0802LCN ADC0802LCD ADC0802LD ADC0803LCN ADC0803LCD ADC0803LCWM ADC0803LD ADC0804LCN ADC0804LCD ADC0804LCWM ERROR ±1/2 LSB ±3/4 LSB ±1 LSB ±1/2 LSB ±3/4 LSB ±1 LSB ±1 LSB ±1 LSB ±1 LSB ±1 LSB EXTERNAL CONDITIONS VREF/2 = 2.500VDC (No Adjustments) TEMP. RANGE (oC) 0 to 70 -40 to 85 -55 to 125 PACKAGE 20 Ld PDIP 20 Ld CERDIP 20 Ld CERDIP 20 Ld PDIP 20 Ld CERDIP 20 Ld SOIC 20 Ld CERDIP 20 Ld PDIP 20 Ld CERDIP 20 Ld SOIC PKG.
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