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®
Data Sheet
July 20, 2005
BBT3821
FN7483.2
Octal 2.488Gbps to 3.187Gbps/ Lane Retimer
• 0.13mm Pure-Digital CMOS Technology • 1.5V Core Supply, Control I/O 2.5V Tolerant
Features
• 8 Lanes of Clock & Data Recovery and Retiming; 4 in Each Direction
• Differential Input/Output
• Wide Operating Data Rate Range: 2.488Gbps to 3.1875Gbps, and 1.244Gbps to 1.59325Gbps
• Ultra Low-Power Operation (195mW typical per lane, 1550mW typical total consumption)
• Low Power Version Available for LX4 Applications
• 17mm Square Low Profile 192 pin 1.0mm Pitch EBGA Package
• Compliant to the IEEE 802.3 10GBASE-LX4(WWDM), 10GBASE-CX4, and XAUI Specifications
• Reset Jitter Domain
• Meets 802.3ae and 802.