Intersil CD40106BMS
The CD40106BMS is supplied in these 14 lead outline packages: Braze Seal DIP Frit Seal DIP Ceramic Flatpack H4Q H1B H3W * F 13 12 L=F Logic Diagram A 1 (3, 5, 9, 11, 13) * * G 2 (4, 6, 8, 10, 12) VDD ALL INPUTS ARE PROTECTED BY CMOS PROTECTION NETWORK VSS FIGURE 1.| Part No. | CD40106BMS |
|---|---|
| Datasheet | CD40106BMS Download |
| Manufacturer |  Intersil |
| Description | CMOS Hex Schmitt Triggers |
| Buy | Stock & Price |
FEATURES
● High Voltage Type (20V Rating)● Schmitt Trigger Action with No External Components
● Hysteresis Voltage (Typ.) - 0.9V at VDD = 5V - 2.3V at VDD = 10V - 3.5V at VDD = 15V
● Noise Immunity Greater than 50%
● No Limit on Input Rise and Fall Times
● Low VDD to VSS Current During Slow Input Ramp
● 100% Tested for Quiescent Current at 20V
● 5V, 10V and 15V Parametric Ratings
● Maximum Input Current of 1µA at 18V Over Full Package Temperature Range; 100nA at 18V and +25oC
● Standardized Symmetrical Output Characteristics
● Meets All Requirements of JEDEC Tentative Standard No. 13B, “Standard Specifications for
DESCRIPTION
of ‘B’ Series CMOS Devices” C 5 I=C 6 VSS 7 Functional Diagram A 1 2 G=A B 3 4 H=BAPPLICATIONS
● Wave and Pulse Shapers● High Noise Environment Systems
● Monostable Multivibrators C 5 6 I=C D 9 8 J=D E 11 10 K=E
● Astable Multivibrators
DESCRIPTION
CD40106BMS consists of six Schmitt trigger circuits. Each circuit functions as an inverter with Schmitt trigger action on the input.
