Intersil CD4015BMS
The CD4015BMS is supplied in these 16 lead outline packages: Braze Seal DIP Frit Seal DIP Ceramic Flatpack H4X H1F H6W CLOCK B CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.| Part No. | CD4015BMS |
|---|---|
| Datasheet | CD4015BMS Download |
| Manufacturer |  Intersil |
| Description | CMOS Dual 4-Stage Static Shift Register |
| Buy | Stock & Price |
FEATURES
● High-Voltage Type (20V Rating)● Medium Speed Operation 12MHz (typ.) Clock Rate at VDD - VSS = 10V
● Fully Static Operation
● 8 Master-Slave Flip-Flops Plus Input and Output Buffering
● 100% Tested For Quiescent Current at 20V
● 5V, 10V and 15V Parametric Ratings
● Standardized Symmetrical Output Characteristics
● Maximum Input Current of 1µA at 18V Over Full Package-Temperature Range; 100nA at 18V and 25oC
● Noise Margin (Full Package-Temperature Range) = - 1V at VDD = 5V - 2V at VDD = 10V - 2.5V at VDD = 15V
● Meets All Requirements of JEDEC Tentative Standard No. 13B, “Standard Specifications for
DESCRIPTION
of ‘B’ Series CMOS Devices” Functional Diagram VDD 16 DATA A CLOCK A RESET A 7 9 6 4 STAGE 5 4 3 10 DATA B 15 1 14 RESET B 4 STAGE 13 12 Q2B 11 Q3B 2 Q4B 8 VSS Q1A Q2A Q3A Q4A Q1BAPPLICATIONS
● Serial-Input/Parallel-Output Data Queueing● Serial to Parallel Data Conversion
● General-Purpose Register
DESCRIPTION
CD4015BMS consists of two identical, independent, 4-stage serial-input/parallel output registers.
