Intersil CD4023BMS
the CD4023BMS is supplied in these 14 lead outline packages: CD4011B CD4012B H4H H1B H3W CD4023B H4Q H1B H3W C 4 D 5 NC 6 VSS 7 CD4023BMS TOP VIEW A 1 B 2 D 3 E 4 F 5 K = DEF 6 VSS 7 14 VDD 13 G 12 H 11 I 10 L = GHI 9 J = ABC 8 C Braze Seal DIP Frit Seal DIP Ceramic Flatpack H4Q H1B H3W CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.| Part No. | CD4023BMS |
|---|---|
| Datasheet | CD4023BMS Download |
| Manufacturer |  Intersil |
| Description | CMOS NAND Gates |
| Buy | Stock & Price |
FEATURES
● High-Voltage Types (20V Rating)● Propagation Delay Time = 60ns (typ.) at CL = 50pF, VDD = 10V
● Buffered Inputs and Outputs
● Standardized Symmetrical Output Characteristics
● Maximum Input Current of 1µA at 18V Over Full PackageTemperature Range; 100nA at 18V and +25oC
● 100% Tested for Maximum Quiescent Current at 20V
● 5V, 10V and 15V Parametric Ratings A 1 B 2 J = AB 3 K = CD 4 C 5 D 6 VSS 7 14 VDD 13 H 12 G 11 M = GH 10 L = EF 9 E 8 F
● Noise Margin (Over Full Package Temperature Range): - 1V at VDD = 5V - 2V at VDD = 10V - 2.5V at VDD = 15V
● Meets All Requirements of JEDEC Tentative Standards No. 13B, “Standard Specifications for
DESCRIPTION
of “B” Series CMOS Device’s J = ABCD 1 A 2 B 3 CD4012BMS TOP VIEW 14 VDD 13 K = EFGH 12 H 11 G 10 F 9 E 8 NC NC = NO CONNECTIONDESCRIPTION
CD4011BMS - Quad 2 Input CD4012BMS - Dual 4 Input CD4023BMS - Triple 3 Input CD4011BMS, CD4012BMS, and CD4023BMS NAND gates provide the system designer with direct implementation of the NAND function and supplement the existing family of CMOS gates.
