HCS165MS Datasheet | Intersil

Radiation Hardened Inverting 8-Bit Parallel-Input/Serial Output Shift Register FN2481 Rev 2.00 September 1995 Features - 3 Micron Radiation Hardened SOS CMOS - Total Dose 200K RAD (Si) - SEP Effective LET No Upsets: >100 MEV-cm2/mg - Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/ Bit-Day (Typ) - Dose Rate Survivability: >1 x 1012 RAD (Si)/s - Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse - Latch-Up Free Under Any Conditions - Fanout (Over Temperature Range) - Standard Outputs - 10 LSTTL Loads - Military Temperature Range: -55o C to +125o C - Significant Power Reduction pared to LSTTL ICs - DC Operating Voltage Range: 4.5V to 5.5V - Input Logic Levels - VIL = 0.3 VCC Max - VIH = 0.7 VCC Min - Input Current Levels Ii  5A at VOL, VOH Description The Intersil HCS165MS is a Radiation Hardened 8-Bit Parallel-In/Serial-Out Shift Register with plementary serial outputs and an asynchronous parallel load input. The HCS165MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of radiation hardened, high-speed, CMOS/SOS Logic Family. The HCS165MS is supplied in a 16 lead Ceramic flatpack (K suffix) or a SBDIP Package (D suffix). Pinouts 16 LEAD CERAMIC DUAL-IN-LINE METAL SEAL PACKAGE (SBDIP) MIL-STD-1835 CDIP2-T16, LEAD FINISH C TOP VIEW PL 1 CP 2 D4 3 D5 4 D6 5 D7 6 Q7 7 GND 8 16 VCC 15 CE 14 D3 13 D2 12 D1 11 D0 10 DS 9...