Intersil HCTS160MS
HCTS160MS is a Radiation Hardened high speed presettable BCD decade synchronous counter that features an asynchronous reset and look-ahead carry logic. The counter is reset by a low on the master reset input, MR. The HCTS160MS utilizes advanced CMOS/SOS technology to achieve high-speed operation.| Part No. | HCTS160MS |
|---|---|
| Datasheet | HCTS160MS Download |
| Manufacturer |  Intersil |
| Description | Radiation Hardened Synchronous Counter |
| Buy | Stock & Price |
FEATURES
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● 3 Micron Radiation Hardened SOS CMOS Total Dose 200K RAD (Si) SEP Effective LET No Upsets: >100 MEV-cm2/mg Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/Bit-Day (Typ) Dose Rate Survivability: >1 x 1012 RAD (Si)/s Dose Rate Upset: >1010 RAD (Si)/s 20ns Pulse Latch-Up Free Under Any Conditions Fanout (Over Temperature Range) -Standard Outputs 10 LSTTL Loads Military Temperature Range: -55oC to +125oC Significant Power Reduction Compared to LSTTL ICs DC Operating Voltage Range: 4.5V to 5.5V LSTTL Input Compatibility -VIL = 0.8V Max -VIH = VCC/2 Min Input Current Levels Ii ≤ 5µA @ VOL, VOH
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DESCRIPTION
The Intersil Counting and parallel presetting are accomplished synchronously with the lowto-high transition of the clock. A low level on the synchronous parallel enable input, SPE, disables counting and allows data at the preset inputs, P0 - P3, to be loaded into the counter. Two count enables, PE and TE are provided for n-bit cascading. TE also controls the terminal count output, TC.
