Intersil HCTS646MS
HCTS646MS is a Radiation Hardened ThreeState Octal Bus Tranceiver/Register with Non-Inverting outputs. This device is a bus transceiver with D-type flip-flops which act as internal storage registers. The HCTS646MS utilizes advanced CMOS/SOS technology to achieve high-speed operation.| Part No. | HCTS646MS |
|---|---|
| Datasheet | HCTS646MS Download |
| Manufacturer |  Intersil |
| Description | Radiation Hardened Octal Bus Transceiver/Register |
| Buy | Stock & Price |
FEATURES
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● 3 Micron Radiation Hardened CMOS SOS Total Dose 200K RAD (Si) SEP Effective LET No Upsets: >100 MEV-cm2/mg Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/ Bit-Day (Typ) Dose Rate Survivability: >1 x 1012 RAD (Si)/s Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse Cosmic Ray Upset Rate 2 x 10-9 Errors/Bit Day Latch-Up Free Under Any Conditions Fanout (Over Temperature Range) - Bus Driver Outputs - 15 LSTTL Loads Military Temperature Range: -55oC to +125oC Significant Power Reduction Compared to LSTTL ICs DC Operating Voltage Range: 4.5V to 5.5V LSTTL Input Compatibility - VIL = 0.8V Max - VIH = VCC/2 Input Current Levels Ii ≤ 5µA at VOL, VOH
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DESCRIPTION
The Intersil Data on the A bus or the B bus can be clocked into the registers on a High-to-Low transition of either CAB ro CBA clock inputs. Output enable (OE) and Direction (DIR) inputs control the transceiver functions. Data present at the high impedance output can be stored in either register or both but only one of the two buses can be enabled as outputs at any one time.
