ISL73033SLHM
features
Undervoltage Lockout (UVLO) protection that ignores the inputs (IN/INB) and keeps the Ga N FET in an OFF state whenever VDRV is below the UVLO threshold.
The ISL73033SLHM inputs can withstand voltages up to 14.7V regardless of the VDD voltage, allowing the inputs to be connected directly to most PWM controllers.
The ISL73033SLHM is offered in an 81 ball 8x8mm Ball Grid Array (BGA) package.
Features
- Production testing and qualification follow the standard AS6294/1
- 100V, 7.5mΩ e Ga N FET with integrated 4.5V gate driver
- Wide driver bias range of 4.5V to 13.2V
- Up to 16.5V logic inputs (regardless of VDD level)
- Inverting and non-inverting inputs
- Integrated driver optimized for enhancement-mode Ga N FETs
- Internal 4.5V regulated gate drive voltage
- Full military temperature range operation
- TA = -55°C to +125°C
- TJ = -55°C to +150°C
- Radiation hardness assurance (lot-by-lot)
- Low dose rate (0.01rad(Si)/s): 75krad(Si)
- SEE hardness for Driver (see the SEE test...
