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SBDIP Datasheet PDF

Intersil SBDIP

The CDP1802A/3 High-Reliability LSI CMOS 8-bit register oriented Central-Processing Unit (CPU) is designed for use as a general purpose computing or control element in a wide range of stored-program systems or products. The CDP1802A/3 includes all of the circuits required for fetching, interpreting, and executing instructions which have been stored in standard types of memories.
Part No. SBDIP
Datasheet SBDIP Download
Manufacturer
Intersil
Description High-Reliability CMOS 8-Bit Microprocessor
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SBDIP datasheet page 1 preview

DESCRIPTION

Extensive input/output (I/O) control features are also provided to facilitate system design. The 1800 Series Architecture is designed with emphasis on the total microcomputer system as an integral entity so that systems having maximum flexibility and minimum cost can be realized. The 1800 Series CPU also provides a synchronous interface to memories and external controllers for I/O devices, and minimizes the cost of interface controllers. Further, the I/O interface is capable of supporting devices operating in polled, interrupt-driven, or direct memory-access modes. The CDP1802AC/3 is functionally identical to its predecessor, the CDP1802. The “A” version includes some performance enhancements and can be used as a direct replacement in systems using the CDP1802. This type is supplied in 40 lead dual-in-line sidebrazed ceramic packages (D suffix).

FEATURES

● For Use In Aerospace, Military, and Critical Industrial Equipment
● Minimum Instruction Fetch-Execute Time of 4.5µs (Maxi...
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