KK4001B
KK4001B is Quad 2-Input NOR Gate High-Voltage Silicon-Gate CMOS manufactured by Kodenshi AUK Group.
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TECHNICAL DATA
Quad 2-Input NOR Gate High-Voltage Silicon-Gate CMOS
The KK4001B NOR gates provide the system designer with direct emplementation of the NOR function.
- Operating Voltage Range: 3.0 to 18 V
- Maximum input current of 1 µA at 18 V over full package-temperature range; 100 n A at 18 V and 25°C
- Noise margin (over full package temperature range): 0.5 V min @ 5.0 V supply 1.0 V min @ 10.0 V supply 1.5 V min @ 15.0 V supply ORDERING INFORMATION KK4001BN Plastic KK4001BD SOIC TA = -55° to 125° C for all packages
LOGIC DIAGRAM
PIN ASSIGNMENT
FUNCTION TABLE
PIN 14 =VCC PIN 7 = GND A L L H H Inputs B L H L H Output Y H L L L
- LOW voltage level H
- HIGH voltage level
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MAXIMUM RATINGS-
Symbol VCC VIN IIN PD Ptot Tstg TL
- Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) DC Input Current, per Pin Power Dissipation in Still Air, Plastic DIP+ SOIC Package+ Power Dissipation per Output Transistor Storage Temperature Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SOIC Package)
Value -0.5 to +20 -0.5 to VCC +0.5 ±10 500 500 100 -65 to +150 260
Unit V V m A m W m W °C °C
Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Remended Operating Conditions. +Derating
- Plastic DIP:
- 12 m W/°C from 100° to 125°C SOIC Package: :
- 7 m W/°C from 65° to 125°C
REMENDED OPERATING CONDITIONS
Symbol VCC VIN, VOUT TA Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage, Output Voltage (Referenced to GND) Operating Temperature, All Package Types Min 3.0 0 -55 Max 18 VCC +125 Unit V V °C
This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, VIN and...