KK74ACT573 Datasheet | Kodenshi AUK Group

TECHNICAL DATA .. Octal 3-State Noninverting Transparent Latch High-Performance Silicon-Gate CMOS The KK74ACT573 is identical in pinout to the LS/ALS573, HC/HCT573. The KK74ACT573 may be used as a level converter for interfacing TTL or NMOS outputs to High Speed CMOS inputs. These latches appear transparent to data (i.e., the outputs change asynchronously) when Latch Enable is high. When Latch Enable goes low, data meeting the setup and hold time bees latched. - TTL/NMOS patible Input Levels - Outputs Directly Interface to CMOS, NMOS, and TTL - Operating Voltage Range: 4.5 to 5.5 V - Low Input Current: 1.0 µA; 0.1 µA @ 25°C - Outputs Source/Sink 24 m A ORDERING INFORMATION KK74ACT573N Plastic KK74ACT573DW SOIC TA = -40° to 85° C for all packages PIN ASSIGNMENT LOGIC DIAGRAM FUNCTION TABLE PIN 20=VCC PIN 10 = GND Output Enable L L L H Inputs Latch Enable H H L X D H L X X Output Q H L no change Z X = don’t care Z = high impedance .. MAXIMUM RATINGS- Symbol VCC VIN VOUT IIN IOUT ICC PD Tstg TL - Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) DC Output Voltage (Referenced to GND) DC Input Current, per Pin DC Output Sink/Source Current, per Pin DC Supply Current, VCC and GND Pins Power Dissipation in Still Air, Plastic DIP+ SOIC Package+ Storage Temperature Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SOIC Package) Value -0.5 to +7.0 -0.5 to VCC +0.5 -0.5 to VCC +0.5 ±20 ±50 ±50 750 500 -65 to +150 260 Unit V V V m A m A m A m W °C °C Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Remended Operating Conditions. +Derating - Plastic DIP: - 10 m W/°C from 65° to 125°C SOIC Package: : - 7 m W/°C from 65° to 125°C REMENDED OPERATING CONDITIONS Symbol VCC VIN, VOUT TJ TA IOH IOL tr, tf - Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage, Output Voltage (Referenced to GND) Junction Temperature...