KK74HC109A Datasheet | Kodenshi AUK Group

TECHNICAL DATA Dual J-K Flip-Flop with Set and Reset High-Performance Silicon-Gate CMOS The KK74HC109A is identical in pinout to the LS/ALS109. The device inputs are patible with standard CMOS outputs, with pullup resistors, they are patible with LS/ALSTTL outputs. This device consists of two J-K flip-flops with individual set, reset, and clock inputs. Changes at the inputs are reflected at the outputs with the next low-to-high transition of the clock. Both Q to Q outputs are available from each flip-flop. - Outputs Directly Interface to CMOS, NMOS, and TTL - Operating Voltage Range: 2.0 to 6.0 V - Low Input Current: 1.0 µA - High Noise Immunity Characteristic of CMOS...