KK74HC595A Datasheet | Kodenshi AUK Group

TECHNICAL DATA 8-Bit Serial-Input/Serial or Parallel-Output Shift Register with Latched 3-State Outputs High-Performance Silicon-Gate CMOS The KK74HC595A is identical in pinout to the LS/ALS595. The device inputs are patible with standard CMOS outputs; with pullup resistors, they are patible with LS/ALSTTL outputs. The KK74HC595A consists of an 8-bit shift register and an 8-bit Dtype latch with three-state parallel outputs. The shift register accepts serial data and provides a serial output. The shift register also provides parallel data to the 8-bit latch. The shift register and latch have independent clock inputs. This device also has an asynchronous reset for the shift register. - Outputs Directly Interface to CMOS, NMOS, and TTL - Operating Voltage Range: 2.0 to 6.0 V - Low Input Current: 1.0 µA - High Noise Immunity Characteristic of CMOS Devices ORDERING INFORMATION KK74HC595AN Plastic KK74HC595AD SOIC TA = -55° to 125° C for all packages PIN ASSIGNMENT LOGIC DIAGRAM PIN 16 =VCC PIN 8 = GND ..net MAXIMUM RATINGS- Symbol VCC VIN VOUT IIN IOUT ICC PD Tstg TL - Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) DC Output Voltage (Referenced to GND) DC Input Current, per Pin DC Output Current, per Pin DC Supply Current, VCC and GND Pins Power Dissipation in Still Air, Plastic DIP+ SOIC Package+ Storage Temperature Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SOIC Package) Value -0.5 to +7.0 -1.5 to VCC +1.5 -0.5 to VCC +0.5 ±20 ±35 ±75 750 500 -65 to +150 260 Unit V V V m A m A m A m W °C °C Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Remended Operating Conditions. +Derating - Plastic DIP: - 10 m W/°C from 65° to 125°C SOIC Package: : - 7 m W/°C from 65° to 125°C REMENDED OPERATING CONDITIONS Symbol VCC VIN, VOUT TA tr, tf Parameter DC Supply Voltage (Referenced to GND)...