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ML610Q102 - 8-bit Microcontroller

Download the ML610Q102 datasheet PDF. This datasheet also covers the ML610Q101 variant, as both devices belong to the same 8-bit microcontroller family and are provided as variant models within a single manufacturer datasheet.

General Description

This LSI is a high-performance 8-bit CMOS microcontroller into which rich peripheral circuits, such as timers, PWM, UART, voltage level supervisor (VLS) function, and 10-bit successive approximation type A/D converter, are incorporated around 8-bit CPU nX-U8/100.

Key Features

  • CPU.
  • 8-bit RISC CPU (CPU name: nX-U8/100).
  • Instruction system: 16-bit instructions.
  • Instruction set: Transfer, arithmetic operations, comparison, logic operations, multiplication/division, bit manipulations, bit logic operations, jump, conditional jump, call return stack manipulations, arithmetic shift, and so on.
  • On-Chip debug function.
  • Minimum instruction execution time 30.5μs (@32.768kHz system clock) 0.122μs (@8.192MHz system clock).

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (ML610Q101-LAPISSemiconductor.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number ML610Q102
Manufacturer LAPIS Semiconductor
File Size 809.39 KB
Description 8-bit Microcontroller
Datasheet download datasheet ML610Q102 Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
ML610Q101/ML610Q102 8-bit Microcontroller FEDL610Q101-01 Issue Date: Jan. 23, 2013 GENERAL DESCRIPTION This LSI is a high-performance 8-bit CMOS microcontroller into which rich peripheral circuits, such as timers, PWM, UART, voltage level supervisor (VLS) function, and 10-bit successive approximation type A/D converter, are incorporated around 8-bit CPU nX-U8/100. The CPU nX-U8/100 is capable of efficient instruction execution in 1-intruction 1-clock mode by pipe line architecture parallel processing. The on-chip debug function that is installed enables program debugging and programming.