• Part: ML610Q346
  • Description: 8-bit Microcontroller
  • Category: Microcontroller
  • Manufacturer: LAPIS Semiconductor
  • Size: 490.22 KB
Download ML610Q346 Datasheet PDF
LAPIS Semiconductor
ML610Q346
ML610Q346 is 8-bit Microcontroller manufactured by LAPIS Semiconductor.
DESCRIPTION Equipped with an LAPIS Semiconductor original 8-bit CPU n X-U8/100, the ML610Q346/ML610346 is a high-performance 8-bit CMOS microcontroller that integrates a wide variety of peripherals such as an op-amp, 12-bit A/D converter, timer, synchronous serial port, UART, and voice output function. The n X-U8/100 CPU is capable of executing instructions efficiently on a one-instruction-per-clock-pulse basis through parallel processing by the 3-stage pipelined architecture. The microcontroller is also equipped with a flash memory that has achieved low voltage and low power consumption (at read) equivalent to mask ROMs, so it is best suited to battery-driven applications such as cellular phones. In addition, it has an on-chip debugging function, which allows software debugging/rewriting with the LSI mounted on the board. FEATURES - CPU - 8-bit RISC CPU (CPU name: n X-U8/100) - Instruction repertoire: 16-bit length instructions - Instruction set: Transfer, arithmetic operations, parison, logical operations, multiply/divide operations, bit manipulation, bit logical operations, jump, conditional jump, call return stack manipulation, and arithmetic shift instructions. - Built-in on-chip debugging function - Minimum instruction execution time: 31.25 s (@ 32k Hz system clock) 0.244 s (@ 4.096 MHz system clock) - Internal memory - ML610Q346 Has 128-Kbyte flash memory (64K  16-bit) built in. (including unusable 1KByte TEST area) - ML610346 Has 128-Kbyte mask memory (64K  16-bit) built in. (including unusable 1KByte TEST area) - Has 1-Kbyte RAM (1024  8-bit) built in. - Interrupt controller - Non-maskable interrupt: 2 sources (1 internal source and 1 external sources) - Maskable interrupt: 18 sources (10 internal sources and 8 external sources) - Time-base counter - Low-speed side time-base counter  1ch - High-speed side time-base counter  1ch - Watchdog timer - Generates a non-maskable interrupt upon the first overflow and a system reset occurs upon the second -...