DESCRIPTION
Programmable row buffers are located on-chip, eliminating the need for external data storage. Each row buffer can store up to 1024 pixels. Two internal register banks are provided allowing two separate sets of filter coefficients to be stored simultaneously. Adaptive filter operations are possible when both register banks are used. An on-chip ALU is provided, allowing real-time arithmetic and logical pixel point operations to be performed on the image data. The 3 x 3 convolver comprises nine 8 x 8-bit multipliers, various pipeline registers, and summers. A complete sum-of-products operation is performed every clock cycle. The FRAME signal resets all data registers without affecting the control and coefficient registers. Pixel and coefficient input data are both 8-bits and can be either signed or unsigned integers. Image data should be in a raster scan non-interlaced format. By using external row buffers and multiple LF48908s, longer pixel rows can be used and convolutions with larger kernel sizes can be performed.
LOGIC Devices Incorporated
