DESCRIPTION
Data present at the A and B input registers is latched on the rising edges of CLK A and CLK B respectively. RND, TC, ACC, and SUB controls are latched on the rising edge of the logical OR of CLK A and CLK B. TC specifies the input as two’s complement (TC HIGH) or unsigned magnitude (TC LOW). RND, when HIGH, adds ‘1’ to the most significant bit position of the least significant half of the product. SubThe LMA1009/2009 produces the 24-bit sequent truncation of the 12 least signifiproduct of two 12-bit numbers. The cant bits produces a result correctly results of a series of multiplications may rounded to 12-bit precision. be accumulated to form the sum of products. Accumulation is performed to The ACC and SUB inputs control accu27-bit precision with the multiplier prod- mulator operation. ACC HIGH results in addition of the multiplier product and uct sign extended as appropriate. the accumulator contents, with the result stored in the accumulator register on the rising edge of CLK R.
LOGIC Devices Incorporated
