DESCRIPTION
TC, ACC, and SUB controls are latched on the rising edge of the logical OR of CLK A and CLK B. TC specifies the input as two’s complement (TC HIGH) or unsigned magnitude (TC LOW). RND, when HIGH, adds ‘1’ to the most significant bit position of the least significant half of the product. Subsequent truncation of the 16 least correctly rounded to 16-bit preciThe results of a series of multiplications sion. may be accumulated to form the sum of products. Accumulation is performed to ACC and SUB control accumulator 35-bit precision with the multiplier prod- operation. ACC HIGH results in addition of the multiplier product and uct sign extended as appropriate. the accumulator contents, with the result Data present at the A and B input regis- stored in the accumulator register on the ters is latched on the rising edges of rising edge of CLK R. ACC and SUB CLK A and CLK B respectively. RND, HIGH results in subtraction of the accumulator contents from the multiplier product, with the result stored B 15-0 in the accumulator register.