LMS12JC35 Datasheet | LOGIC Devices Incorporated

LMS12 DEVICES INCORPORATED 12-bit Cascadable Multiplier-Summer LMS12 DEVICES INCORPORATED 12-bit Cascadable Multiplier-Summer DESCRIPTION The LMS12 is a high-speed 12 x 12-bit binatorial multiplier integrated with a 26-bit adder in a single 84-pin package. It is an ideal building block for the implementation of very highspeed FIR filters for video, RADAR, and other similar applications. The LMS12 implements the general form (A- B) + C. As a result, it is also useful in implementing polynomial approximations to transcendental functions. ARCHITECTURE A block diagram of the LMS12 is shown below. Its major Features are discussed individually in the following paragraphs. MULTIPLIER The...