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LF3312 Datasheet PDF

LOGIC Devices LF3312

The LF3312 is a 12,441,600-bit memory device which can be configured by the user into either a twodata-port single-channel or a four-data-port dual-channel architecture. The input data ports may be clocked simultaneously or asynchronously with one another and with the output ports.
Part No. LF3312
Datasheet LF3312 Download
Manufacturer LOGIC Devices
Description 12-Mbit Frame Buffer / FIFO
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LF3312 datasheet page 1 preview

FEATURES

12,441,600-bit Frame Memory 74.25MHz Max Data Rate May be Organized Into the Following Configurations:
● 1,555,200 x 8-bit (single channel)
● 1,244,160 x 10-bit (single channel)
● 1,036,800 x 12-bit (single channel)
● 777,600 x 16-bit (width expansion - dual channel)
● 622,080 x 20-bit (width expansion - dual channel)
● 518,400 x 24-bit (width expansion - dual channel)
● 777,600 x 8-bit (each of two parallel channels)
● 622,080 x 10-bit (each of two parallel channels)
● 518,400 x 12-bit (each of two parallel channels) Operating Modes:
● Random Access with External Address Port (Single-channel)
● FIFO With Asynchronous I/O (Single-channel)
● FIFO With Asynchronous I/O (Dual-channel)
● Synchronous Shift Register (Single-channel)
● Synchronous Shift Register (Dual-channel)
● FIFO + shift register; Channel B Synchronized to Channel A
● Shift register + FIFO; One channel Synchronized to the other Near-Full/Empty Flags With Programmable Thresholds Flexible Pointer Manipulation
● Wri...
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