24C32 Datasheet Text
LESHAN RADIO PANY, LTD.
32K bits (4096 X 8) / 64K bits (8192 X 8) Two-wire Serial EEPROM Two-wire Serial EEPROM
LR 24C32/LR 24C64
Features
Two-wire Serial Interface VCC = 1.8V to 5.5V Bi-directional Data Transfer Protocol Internally Organized LR24C32, 4096 X 8 (32K bits) LR24C64, 8192 X 8 (64K bits) 400 kHz (1.8V, 2.7V,5V) patibility 32-byte Page (32K/64K) Write Modes Partial Page Writes Allowed Self-timed Write Cycle (5 ms max) High-reliability 1 Million Write Cycles guaranteed Data Retention > 100 Years Operating Temperature: -40 to +85 8-lead PDIP, 8-lead SOP and 8-lead TSSOP Packages
Pin Configuration
Ordering Infomation
LR24Cxx: PDIP8 LR24CxxD: SOP8 LR24CxxT: TSSOP8
Description
LR24C32/LR24C64 provides 32768/65536 bits of serial electrically erasable and programmable read-only memory (EEPROM) organized as 4096 words of 8 bits each. The device is optimized for use in many industrial and mercial applications where low-power and low-voltage operations are essential. The LR24C32/LR24C64 is available in space-saving 8-lead PDIP, 8-lead SOP, and 8-lead TSSOP packages and is accessed via a two-wire serial interface.
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LESHAN RADIO PANY, LTD.
Pin Descriptions
Pin number Designation Type Name and Functions
1- 3
5 6
7 4 8
A0
- A2
SDA SCL
WP GND VCC
I
I/O & Open-dr ain I
I
P P
Address Inputs DEVICE/PAGE ADDRESSES (A2, A1, A0): The A2,
A1 and A0 pins are device address inputs that are hardwired or left not connected for hardware patibility with other 24Cxx devices. When the pins are hardwired, as many as eight 32K/64K devices may be addressed on a single bus system (device addressing is discussed in detail under the Device Addressing section). If the pins are left floating, the A2, A1 and A0 pins will be internally pulled down to GND if the capacitive...
