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L74VHC1G125 - Noninverting 3-State Buffer

Features

  • High Speed: tPD = 3.5 ns (Typ) at VCC = 5.0 V Low Power Dissipation: ICC = 1 mA (Max) at TA = 25°C Power Down Protection Provided on Inputs Balanced Propagation Delays Pin and Function Compatible with Other Standard Logic Families Chip Complexity: FETs = 58; Equivalent Gates = 15 Pb.
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Datasheet Details

Part number L74VHC1G125
Manufacturer LRC
File Size 482.52 KB
Description Noninverting 3-State Buffer
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LESHAN RADIO COMPANY, LTD. Noninverting 3−State Buffer L74VHC1G125 The L74VHC1G125 is an advanced high speed CMOS noninverting 3 state buffer fabricated with silicon gate noninverting 3 state buffer fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation. The internal circuit is composed of three stages, including a buffered 3-state output which provides high noise immunity and stable output. The L74VHC1G125 input structure provides protection when voltages up to 7.0V are applied,regardless of the supply voltage. This allows the L74VHC1G125 to be used to interface 5.0V circuits to 3.0V circuits. Features • • • • • • • High Speed: tPD = 3.5 ns (Typ) at VCC = 5.
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