LSI Computer Systems LS7031
The LS7031 is a monolithic, ion implanted MOS, 6 decade up counter. The circuit includes latches, a multiplexer, leading zero blanking and BCD data outputs. When operated in this fashion the maximum allowable propagaton delay between B4/D2 (H-L) and B8/D2 (L-H), measured at Vss - 1V, is 10ns.FEATURES
:● DC to 7.5 MHz Count Frequency
● Multiplexed BCD Outputs
● DC to 500kHz Scan Frequency
● +4.75V to +15V Operation (VDD-VSS)
● Compatible with CMOS Logic
● High Input Noise Immunity
● Ability to Latch External BCD Data in the two LSD Positions
● Leading Zero Blanking with Decimal Point and Overflow Controls
● All inputs protected
● Low Power Dissipation
● 40 Pin DIP - See Figure 1
DESCRIPTION
: CLOCK GENERATOR The clock for the six decade counter (digit positions 3-8) is formed from the internal ‘OR’ combination of B4/D2 and B8/D2 if LS7031 is used with external prescaling counters. If used as a straight six decade counter, clock pulses may be applied to inputs B4/D2 or B8/D2 with the unused input held low. In either mode of operation total pulse width must be minimum 62ns. See Block Diagram. 6 DECADE UP COUNTER The six decade ripple through counter increments on the negative edge of the input count pulse. Maximum ripple time is 12µs (999999 to 000000). Maximum count frequency is 7.5MHz.