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8600V - 3.3V In-System Programmable SuperBIG High Density PLD

Description

The ispLSI 8000V Family of Register-Intensive, 3.3V SuperBIG In-System Programmable Logic Devices is based on Big Fast Megablocks of 120 registered macrocells and a Global Routing Plane (GRP) structure interconnecting the Big Fast Megablocks.

Features

  • SuperBIG HIGH.

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Datasheet preview – 8600V

Datasheet Details

Part number 8600V
Manufacturer Lattice Semiconductor
File Size 333.11 KB
Description 3.3V In-System Programmable SuperBIG High Density PLD
Datasheet download datasheet 8600V Datasheet
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Full PDF Text Transcription

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ispLSI 8600V ® 3.3V In-System Programmable SuperBIG™ High Density PLD Features • SuperBIG HIGH DENSITY IN-SYSTEM PROGRAMMABLE LOGIC — 3.3V Power Supply — 32,000 PLD Gates/600 Macrocells — 192-264 I/O Pins Supporting 3.3V/2.5V I/O — 864 Registers — High-Speed Global and Big Fast Megablock (BFM) Interconnect — Wide 20-Macrocell Generic Logic Block (GLB) for High Performance — Wide Input Gating (44 Inputs per GLB) for Fast Counters, State Machines, Address Decoders, Etc. — PCB-Efficient Ball Grid Array (BGA) Package Options • HIGH-PERFORMANCE E CMOS TECHNOLOGY — fmax = 125 MHz Maximum Operating Frequency — tpd = 8.
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