Description
PIN
rst clk datai[7:0] addr[2:0] cs wr rd rclk baudclk si cts dsr dcd ri baudclken rclken baudout datao[7:0] so ddis txrdy rxrdy rts dtr out1 out2 intr
RCVR Buffer & RCVR FIFO
TYPE
input input input input input input input input input input input input input input input input output output output
Features
- Software compatible with 16450 and 16550 UARTs Configuration capability Separate configurable BAUD clock line Two modes of operation: UART mode and FIFO mode Majority Voting Logic In the FIFO mode transmitter and receiver are each buffered with 16 byte FIFO to reduce the number of interrupts presented to the CPU Adds or deletes standard asynchronous communication bits (start, stop, and parity) to or from the serial data In UART mode receiver and transmitter ar.
D16550 Datasheet
