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GAL18V10 - High Performance E2CMOS PLD Generic Array Logic

This page provides the datasheet information for the GAL18V10, a member of the GAL High Performance E2CMOS PLD Generic Array Logic family.

Description

The GAL18V10, at 7.5 ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide a very flexible 20-pin PLD.

CMOS circuitry allows the GAL18V10 to consume much less power when compared to its bipolar counterparts.

Features

  • HIGH.

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Datasheet preview – GAL18V10

Datasheet Details

Part number GAL18V10
Manufacturer Lattice Semiconductor
File Size 265.88 KB
Description High Performance E2CMOS PLD Generic Array Logic
Datasheet download datasheet GAL18V10 Datasheet
Additional preview pages of the GAL18V10 datasheet.

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Full PDF Text Transcription

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GAL18V10 High Performance E2CMOS PLD Generic Array Logic™ Features • HIGH PERFORMANCE E2CMOS® TECHNOLOGY — 7.5 ns Maximum Propagation Delay — Fmax = 111 MHz — 5.
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