Lattice Semiconductor ISPLSI1024EA
In-System Programmable High Density PLD
| Part No. | ISPLSI1024EA |
|---|---|
| Datasheet | ISPLSI1024EA Download |
| Manufacturer |  Lattice Semiconductor |
| Description | In-System Programmable High Density PLD |
| Buy | Stock & Price |
FEATURES
● HIGH DENSITY PROGRAMMABLE LOGIC — 4000 PLD Gates — 48 I/O Pins, Two Dedicated Inputs — 144 Registers — High Speed Global Interconnect — Wide Input Gating for Fast Counters, State Machines, Address Decoders, etc. — Small Logic Block Size for Random Logic● NEW
FEATURES
— 100% IEEE 1149.1 Boundary Scan Testable — ispJTAG™ In-System Programmable via IEEE 1149.1 (JTAG) Test Access Port — User Selectable 3.3V or 5V I/O Supports MixedVoltage Systems (VCCIO Pin) — Open-Drain Output Option● HIGH PERFORMANCE E2CMOS® TECHNOLOGY — fmax = 200 MHz Maximum Operating Frequency — tpd = 4.5 ns Propagation Delay — TTL Compatible Inputs and Outputs — Electrically Erasable and Reprogrammable — Non-Volatile — 100% Tested at Time of Manufacture — Unused Product Term Shutdown Saves Power
● IN-SYSTEM PROGRAMMABLE — Increased Manufacturing Yields, Reduced Time-toMarket and Improved Product Quali
