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ISPLSI2032VL - 2.5V In-System Programmable SuperFAST High Density PLD

Download the ISPLSI2032VL datasheet PDF. This datasheet also covers the ISP-LSI variant, as both devices belong to the same 2.5v in-system programmable superfast high density pld family and are provided as variant models within a single manufacturer datasheet.

General Description

The ispLSI 2032VL is a High Density Programmable Logic Device containing 32 Registers, 32 Universal I/O pins, two Dedicated Input Pins, three Dedicated Clock Input Pins, one dedicated Global OE input pin and a Global Routing Pool (GRP).

Key Features

  • SuperFAST HIGH.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (ISP-LSI-2032.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number ISPLSI2032VL
Manufacturer Lattice Semiconductor
File Size 156.97 KB
Description 2.5V In-System Programmable SuperFAST High Density PLD
Datasheet download datasheet ISPLSI2032VL Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
ispLSI 2032VL 2.5V In-System Programmable SuperFAST™ High Density PLD Features • SuperFAST HIGH DENSITY IN-SYSTEM PROGRAMMABLE LOGIC — 1000 PLD Gates — 32 I/O Pins, Two Dedicated Inputs — 32 Registers — High Speed Global Interconnect — Wide Input Gating for Fast Counters, State Machines, Address Decoders, etc. — Small Logic Block Size for Random Logic — 100% Functional, JEDEC and Pinout Compatible with ispLSI 2032V and 2032VE Devices • 2.5V LOW VOLTAGE 2032 ARCHITECTURE — Interfaces With Standard 3.3V Devices (Inputs and I/Os are 3.3V Tolerant) — 45 mA Typical Active Current • HIGH PERFORMANCE E2CMOS® TECHNOLOGY — fmax = 180 MHz Maximum Operating Frequency — tpd = 5.