Lattice Semiconductor ISPLSI2128V
The ispLSI 2128V is a High Density Programmable Logic Device available in 128 and 64 I/O-pin versions. The device contains 128 Registers, eight Dedicated Input pins, three Dedicated Clock Input pins, two dedicated Global OE input pins and a Global Routing Pool (GRP). The GRP provides complete interconnectivity between all of these elements.| Part No. | ISPLSI2128V |
|---|---|
| Datasheet | ISPLSI2128V Download |
| Manufacturer |  Lattice Semiconductor |
| Description | 3.3V High Density Programmable Logic |
| Buy | Stock & Price |
FEATURES
● HIGH DENSITY PROGRAMMABLE LOGIC — — — — — 6000 PLD Gates 128 and 64 I/O Pin Versions, Eight Dedicated Inputs 128 Registers High Speed Global Interconnect Wide Input Gating for Fast Counters, State Machines, Address Decoders, etc. — Small Logic Block Size for Random Logic Output Routing Pool (ORP) D7 D6 D5 D4 Output Routing Pool (ORP) D3 D2 D1 D0 C7 ® Functional Block Diagram* Output Routing Pool (ORP) A0 A1 C6 A2● 3.3V LOW VOLTAGE 2128 ARCHITECTURE — Interfaces with Standard 5V TTL Devices — The 128 I/O Pin Version is Fuse Map Compatible with 5V ispLSI 2128
● HIGH PERFORMANCE E CMOS TECHNOLOGY — — — — — — 2 ® A3 Output Routing Pool (ORP) A4 D Q GLB C3 A5 C2 A7 EW fmax = 80 MHz Maximum Operating Frequency tpd = 10 ns Propagation Delay Electrically Erasable and Reprogrammable Non-Volatile 100% Tested at Time of Manufacture Unused Product Term Shutdown Saves Power A6 D B0 B1 B2 B3 B4 Output Routing Pool (ORP) D Q C1 Global Routing Pool (GRP) B5 B6 B7 C0 Output Routing Pool (OR...
