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ISPPAC10 Datasheet PDF

Lattice Semiconductor ISPPAC10

The ispPAC10 is a member of the Lattice family of InSystem Programmable analog circuits, digitally configured via nonvolatile E2CMOS technology. With no requirement for external configuration components, ispPAC10 expedites the design process, simplifying prototype circuit implementation and change, while providing high performance and integrated functionality. Designers configure the ispPAC10 and verify its performance using PAC-Designer®, an easy-to-use, Microsoft Windows® compatible development tool.
Part No. ISPPAC10
Datasheet ISPPAC10 Download
Manufacturer
Lattice Semiconductor
Description In-System Programmable Analog Circuit
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ISPPAC10 datasheet page 1 preview

FEATURES

● IN-SYSTEM PROGRAMMABLE (ISP™) ANALOG CIRCUIT — Four Instrument Amplifier Gain/Attenuation Stages — Signal Summation (Up to 4 Inputs) — Precision Active Filtering (10kHz to 100kHz) — No External Components Needed for Configuration — Non-Volatile E2CMOS® Cells (10,000 Cycles) — IEEE 1149.1 JTAG Serial Port Programming
● FOUR LINEAR ELEMENT BUILDING BLOCKS — Programmable Gain Range (0dB to 80dB) — Bandwidth of 550kHz (G=1), 330kHz (G=10) — Low Distortion (THD < -74dB max @ 10kHz) — Auto-Calibrated Input Offset Voltage
● TRUE DIFFERENTIAL I/O (±3V RANGE) — High CMR (69dB) Instrument Amplifier Inputs — 2.5V Common Mode Reference on Chip — Four Rail-to-Rail Voltage Outputs
● 28-PIN PLASTIC DIP OR SOIC PACKAGE — Single Supply 5V Operation
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APPLICATIONS

INCLUDE INTEGRATED: — Single +5V Supply Signal Conditioning — Active Filters, Gain Stages, Summing Blocks — Analog Front Ends, 12-Bit Data Acq. Systems — Sensor Signal Conditioning Functional Block Diagram OUT2+ OUT2– IN2+ IN2– TDI...
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