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ISPXPLD5768MX - eXpanded Programmable Logic Device XPLD

Download the ISPXPLD5768MX datasheet PDF. This datasheet also covers the ISPXPLD5000MX variant, as both devices belong to the same expanded programmable logic device xpld family and are provided as variant models within a single manufacturer datasheet.

Key Features

  • Flexible Multi-Function Block (MFB) Architecture.
  • SuperWIDE™ logic (up to 136 inputs).
  • Arithmetic capability.
  • Single- or Dual-port SRAM.
  • FIFO.
  • Ternary CAM.
  • sysCLOCK™ PLL Timing Control.
  • Multiply and divide between 1 and 32.
  • Clock shifting capability.
  • External feedback capability.
  • sysIO™ Interfaces.
  • LVCMOS 1.8, 2.5, 3.3V.
  • Programmable impedance.
  • Hot-socketing.
  • Flexible bus-m.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (ISPXPLD5000MX_LatticeSemiconductor.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number ISPXPLD5768MX
Manufacturer Lattice Semiconductor
File Size 860.30 KB
Description eXpanded Programmable Logic Device XPLD
Datasheet download datasheet ISPXPLD5768MX Datasheet

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Other Datasheets by Lattice Semiconductor

Part Number Description
ISPXPLD5000MX eXpanded Programmable Logic Device XPLD
ISPXPLD51024MX eXpanded Programmable Logic Device XPLD
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ISPXPLD5512MX eXpanded Programmable Logic Device XPLD
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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
DISSECLOENCTTINDUEEVIDCES ispXPLDTM 5000MX Family 3.3V, 2.5V and 1.8V In-System Programmable eXpanded Programmable Logic Device XPLD™ Family February 2010 Data Sheet Features  Flexible Multi-Function Block (MFB) Architecture • SuperWIDE™ logic (up to 136 inputs) • Arithmetic capability • Single- or Dual-port SRAM • FIFO • Ternary CAM  sysCLOCK™ PLL Timing Control • Multiply and divide between 1 and 32 • Clock shifting capability • External feedback capability  sysIO™ Interfaces • LVCMOS 1.8, 2.5, 3.3V – Programmable impedance – Hot-socketing – Flexible bus-maintenance (Pull-up, pulldown, bus-keeper, or none) – Open drain operation • SSTL 2, 3 (I & II) • HSTL (I, III, IV) • PCI 3.3 • GTL+ • LVDS • LVPECL • LVTTL Table 1.