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LC4064V Datasheet PDF

Lattice Semiconductor LC4064V

The high performance ispMACH 4000 family from Lattice offers a SuperFAST CPLD solution. The family is a blend of Lattice’s two most popular architectures: the ispLSI® 2000 and ispMACH 4A.
Part No. LC4064V
Datasheet LC4064V Download
Manufacturer
Lattice Semiconductor
Description 3.3V / 2.5V / 1.8V In-System Programmable SuperFAST High Density PLDs
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LC4064V datasheet page 1 preview

FEATURES

● High Performance
● Broad Device Offering
● fMAX = 400MHz maximum operating frequency
● tPD = 2.5ns propagation delay
● Up to four global clock pins with programmable clock polarity control
● Up to 80 PTs per output
● Enhanced macrocells with individual clock, reset, preset and clock enable controls
● Up to four global OE controls
● Individual local OE control per I/O pin
● Excellent First-Time-FitTM and refit
● Fast path, SpeedLockingTM Path, and wide-PT path
● Wide input gating (36 input logic blocks) for fast counters, state machines and address decoders
● Multiple temperature range support – Commercial: 0 to 90°C junction (Tj) – Industrial: -40 to 105°C junction (Tj) – Automotive: -40 to 130°C junction (Tj)
● Easy System Integration
● Ease of Design
● Zero Power (ispMACH 4000Z) and Low Power (ispMACH 4000V/B/C)
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● Typical static current 10µA (4032Z) Typical static current 1.3mA (4000C) 1.8V core low dynamic power ispMACH 4000Z operational down to 1.6V VCC
● Superior s...
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