LCMXO1200
Overview
The MachXO is optimized to meet the requirements of applications traditionally addressed by CPLDs and low capacity FPGAs: glue logic, bus bridging, bus interfacing, power-up control, and control logic. These devices bring together the best features of CPLD and FPGA devices on a single chip.
- Non-volatile, Infinitely Reconfigurable
- Instant-on - powers up in microseconds
- Single chip, no external configuration memory required
- Excellent design security, no bit stream to intercept
- Reconfigure SRAM based logic in milliseconds
- SRAM and non-volatile memory programmable through JTAG port
- Supports background programming of non-volatile memory
- Sleep Mode
- Allows up to 100x static current reduction
- TransFR™ Reconfiguration (TFR)