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LX128B-5F208C Datasheet PDF

Lattice Semiconductor LX128B-5F208C

The ispGDX2™ family is Lattice’s second generation in-system programmable generic digital crosspoint switch for high speed bus switching and interface applications. The ispGDX2 family is available in two options.
Part No. LX128B-5F208C
Datasheet LX128B-5F208C Download
Manufacturer
Lattice Semiconductor
Description High Performance Interfacing and Switching
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LX128B-5F208C datasheet page 1 preview

FEATURES

Includes High, Performance t os -C w Lo “E-Series” High Performance Interfacing and Switching Data Sheet
● Two Options Available
● High-performance sysHSI (standard part number)
● Low-cost, no sysHSI (“E-Series”)
● High Performance Bus Switching
● High bandwidth – Up to 12.8 Gbps (SERDES) – Up to 38 Gbps (without SERDES)
● Up to 16 (15x10) FIFOs for data buffering
● High speed performance – fMAX = 360MHz – tPD = 3.0ns – tCO = 2.9ns – tS = 2.0ns
● Built-in programmable control logic capability
● I/O intensive: 64 to 256 I/Os
● Expanded MUX capability up to 188:1 MUX
● sysHSI Blocks Provide up to 16 High-speed Channels
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● Serializer/de-serializer (SERDES) included Clock Data Recovery (CDR) built in 800 Mbps per channel LVDS differential support 10B/12B support – Encoding / decoding – Bit alignment – Symbol alignment
● 8B/10B support – Bit alignment – Symbol alignment
● Source Synchronous support
● sysCLOCK™ PLL
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● Frequency synthesis and skew management Clock multipl...
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