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ispGDX80VA-7T100 Datasheet PDF

Lattice Semiconductor ispGDX80VA-7T100

The ispGDXVA architecture provides a family of fast, flexible programmable devices to address a variety of system-level digital signal routing and interface requirements including: • Multi-Port Multiprocessor Interfaces • Wide Data and Address Bus Multiplexing (e.g. The architecture of the devices consists of a series of programmable I/O cells interconnected by a Global Routing Pool (GRP).
Part No. ispGDX80VA-7T100
Datasheet ispGDX80VA-7T100 Download
Manufacturer
Lattice Semiconductor
Description In-System Programmable 3.3V Generic Digital CrosspointTM
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ispGDX80VA-7T100 datasheet page 1 preview

FEATURES

● IN-SYSTEM PROGRAMMABLE GENERIC DIGITAL CROSSPOINT FAMILY — Advanced Architecture Addresses Programmable PCB Interconnect, Bus Interface Integration and Jumper/Switch Replacement — “Any Input to Any Output” Routing — Fixed HIGH or LOW Output Option for Jumper/DIP Switch Emulation — Space-Saving PQFP and BGA Packaging — Dedicated IEEE 1149.1-Compliant Boundary Scan Test
● HIGH PERFORMANCE E2CMOS® TECHNOLOGY — 3.3V Core Power Supply — 3.5ns Input-to-Output/3.5ns Clock-to-Output Delay — 250MHz Maximum Clock Frequency — TTL/3.3V/2.5V Compatible Input Thresholds and Output Levels (Individually Programmable) — Low-Power: 16.5mA Quiescent Icc — 24mA IOL Drive with Programmable Slew Rate Control Option — PCI Compatible Drive Capability — Schmitt Trigger Inputs for Noise Immunity — Electrically Erasable and Reprogrammable — Non-Volatile E2CMOS Technology
● ispGDXV™ OFFERS THE FOLLOWING ADVANTAGES — 3.3V In-System Programmable Using Boundary Scan Test Access Port (TAP) — Change Interco...
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