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MACH110-15 Datasheet PDF

Lattice MACH110-15

The MACH110 is a member of our high-performance EE CMOS MACH 1 family. This device has approximately three times the logic macrocell capability of the popular PAL22V10 without loss of speed. The MACH110 consists of two PAL blocks interconnected by a programmable switch matrix.
Part No. MACH110-15
Datasheet MACH110-15 Download
Manufacturer
Lattice
Description High-Density EE CMOS Programmable Logic
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MACH110-15 datasheet page 1 preview

GENERAL DESCRIPTION

The two PAL blocks are essentially “PAL22V16” structures complete with product-term arrays and programmable macrocells. The switch matrix connects the PAL blocks to each other and to all input pins, providing a high degree of connectivity between the fully-connected PAL blocks. This allows designs to be placed and routed efficiently. s 32 Outputs s 32 Flip-flops; 2 clock choices s 2 “PAL22V16” Blocks s Pin-compatible with MACH111, MACH210, M
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