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MACH230-10 - High-Density EE CMOS Programmable Logic

General Description

The MACH230 is a member of the high-performance EE CMOS MACH 2 device family.

This device has approximately twelve times the logic macrocell capability of the popular PAL22V10 without loss of speed.

The MACH230 consists of eight PAL blocks interconnected by a programmable switch matrix.

Key Features

  • the MACH230 takes the 64 logic pr.

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Datasheet Details

Part number MACH230-10
Manufacturer Lattice
File Size 230.55 KB
Description High-Density EE CMOS Programmable Logic
Datasheet download datasheet MACH230-10 Datasheet

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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FINAL COM’L: -10/15/20 IND: -18/24 MACH230-10/15/20 High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS 84 Pins 128 Macrocells 10 ns tPD Commercial 18 ns tPD Industrial 100 MHz fCNT 70 Inputs 64 Outputs Lattice Semiconductor 128 Flip-flops; 4 clock choices 8 “PAL26V16” blocks with buried macrocells Pin-compatible with MACH130, MACH131, MACH231, and MACH435 GENERAL DESCRIPTION The MACH230 is a member of the high-performance EE CMOS MACH 2 device family. This device has approximately twelve times the logic macrocell capability of the popular PAL22V10 without loss of speed. The MACH230 consists of eight PAL blocks interconnected by a programmable switch matrix.