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FINAL
COM’L: -12/15/20, Q-20/25
MACH435-12/15/20, Q-20/25
High-Density EE CMOS Programmable Logic
DISTINCTIVE CHARACTERISTICS
s 84 Pins in PLCC s 128 Macrocells s 12 ns tPD s 83.3 MHz fCNT s 70 Inputs with pull-up resistors s 64 Outputs s 192 Flip-flops — 128 Macrocell flip-flops — 64 Input flip-flops s Up to 20 product terms per function, with XOR
Lattice Semiconductor
s Flexible clocking — Four global clock pins with selectable edges — Asynchronous mode available for each macrocell s 8 “PAL33V16” blocks s Input and output switch matrices for high routability s Fixed, predictable, deterministic delays s Pin compatible with MACH130, MACH131, MACH230, and MACH231
GENERAL DESCRIPTION
The MACH435 is a member of our high-performance EE CMOS MACH 4 family.